Carafe also has the capability of extracting break faults, which result when a spot defect occurs consisting of missing conducting material or extra insulating material; research has shown breaks to be a common defect occurring in current CMOS fabrication processes [Rog94] [RF94]. Breaks can cause a node to split into two or more smaller nodes. This can result in nodes that cannot be charged to power or ground, and nodes that are only charged under certain inputs.
The intra-layer breaks reported by Carafe indicate the effects of a spot of missing conducting material or extra insulating material, with a size determined by the defect radii, occurring on the chip. The result is broken connections, which leave formerly connected terminals disconnected. Inter-layer breaks reported by Carafe represent failed contacts (vias) but do not include spot defects that occur on a contact (nor do intra-layer breaks). In other words, only the connection between layers is broken, while each layer connected by the contact is unaffected.