Carafe now supports transistor gate bridge/break faults, which are the result of missing polysilicon in the gate region of a transistor. As a consequence of the self-aligning processes in wide use today, this defect results in both a break in the gate region of the transistor and a bridge between the diffusion regions of the transistor.
Carafe extracts breaks in transistor gates during break extraction, and then performs extra processing on the gate breaks in order to find the corresponding bridges. Thus these breaks have edges in the electrical node subgraph with the rest of the circuit breaks. For each bridge/break fault, Carafe reports two sets of node lists, one for the bridges and one for the breaks.